@prefix owl: <http://www.w3.org/2002/07/owl#> .
@prefix skos: <http://www.w3.org/2004/02/skos/core#> .
@prefix dc: <http://purl.org/dc/terms/> .
@prefix xsd: <http://www.w3.org/2001/XMLSchema#> .

<http://data.loterre.fr/ark:/67375/8LP> a owl:Ontology, skos:ConceptScheme .
<http://data.loterre.fr/ark:/67375/8LP-JJFVWNJT-8>
  skos:definition "An integrated circuit that can be programmed to implement specific functions, with characteristics such as parallel computing capabilities, low power consumption and low latency. FPGAs have been widely employed to accelerate the inference of convolutional neural networks and show potential in Transformer-based models. (Liu et al., An Efficient FPGA-Based Accelerator for Swin Transformer, 2023)"@en, "Matrice de blocs logiques programmables de la famille réseaux logiques programmables"@fr ;
  skos:exactMatch <https://www.wikidata.org/wiki/Q190411> ;
  skos:altLabel "FPGA"@fr, "FPGA"@en ;
  dc:modified "2024-06-13T14:10:47"^^xsd:dateTime ;
  skos:inScheme <http://data.loterre.fr/ark:/67375/8LP> ;
  skos:broader <http://data.loterre.fr/ark:/67375/8LP-TVRD68SS-2> ;
  skos:prefLabel "réseau de portes programmables sur site"@fr, "field-programmable gate array"@en ;
  a skos:Concept ;
  skos:hiddenLabel "Réseau de portes programmables sur site"@fr, "Field-programmable gate array"@en .

<http://data.loterre.fr/ark:/67375/8LP-TVRD68SS-2>
  skos:prefLabel "high performance computing system"@en, "système informatique dédié à la haute performance"@fr ;
  a skos:Concept ;
  skos:narrower <http://data.loterre.fr/ark:/67375/8LP-JJFVWNJT-8> .